The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 14, 2017

Filed:

Mar. 31, 2015
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Yao-Yuan Shang, Taichung, TW;

Kuo-Shu Tseng, New Taipei, TW;

Chune-Te Yang, Erlin Township, Changhua County, TW;

Chi-Hsin Chan, Taichung, TW;

Chung-Jhieh Chen, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/68 (2006.01); G06T 7/00 (2006.01); H01L 21/67 (2006.01); H01L 21/687 (2006.01); H01L 21/02 (2006.01); H01L 21/027 (2006.01); H01L 21/66 (2006.01); H01L 21/677 (2006.01);
U.S. Cl.
CPC ...
H01L 21/681 (2013.01); G06T 7/0004 (2013.01); G06T 7/0044 (2013.01); H01L 21/02052 (2013.01); H01L 21/0271 (2013.01); H01L 21/67051 (2013.01); H01L 21/67259 (2013.01); H01L 21/67742 (2013.01); H01L 21/68707 (2013.01); H01L 22/26 (2013.01); G06T 2207/30148 (2013.01);
Abstract

A method for positioning a wafer in semiconductor fabrication is provided. The method includes sending a wafer into a processing chamber by a transferring module. The method further includes producing a video image in relation to an edge of the wafer by a monitoring module. The method also includes performing an image analysis on the video image to determine if the edge of the wafer is in a correct position. If the edge of the wafer is not in a correct position a shifting value is calculated and the wafer is moved according to the shifting value.


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