The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 07, 2017
Filed:
Jul. 10, 2014
Applicants:
Chawon Koh, Yongin-si, KR;
Cheol Hong Park, Seoul, KR;
Ki-jeong Kim, Hwaseong-si, KR;
Hyunwoo Kim, Seongnam-si, KR;
Hyosung Lee, Suwon-si, KR;
Inventors:
Chawon Koh, Yongin-si, KR;
Cheol Hong Park, Seoul, KR;
Ki-Jeong Kim, Hwaseong-si, KR;
Hyunwoo Kim, Seongnam-si, KR;
Hyosung Lee, Suwon-si, KR;
Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/311 (2006.01); H01L 21/027 (2006.01); H01L 21/308 (2006.01); H01L 27/115 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0271 (2013.01); H01L 21/3086 (2013.01); H01L 27/11548 (2013.01); H01L 27/11556 (2013.01); H01L 27/11575 (2013.01); H01L 27/11582 (2013.01);
Abstract
A method for fabricating a semiconductor device is provided. In the method, a first hard mask layer is formed on a stepped structure. The first hard mask layer has a level top surface and thickness sufficient to etch the structure. A second hard mask pattern is formed on the first hard mask layer. The first hard mask layer is etched using the second hard mask pattern. Size dispersion of the patterns may be reduced by the first hard mask layer.