The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 31, 2017

Filed:

Dec. 10, 2013
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Todd O. Bolken, Star, ID (US);

Chad A. Cobbley, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/00 (2006.01); H01L 23/31 (2006.01); H01L 23/538 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2006.01); H01L 25/10 (2006.01);
U.S. Cl.
CPC ...
H01L 25/50 (2013.01); H01L 23/3128 (2013.01); H01L 23/5383 (2013.01); H01L 24/10 (2013.01); H01L 24/13 (2013.01); H01L 24/73 (2013.01); H01L 25/0652 (2013.01); H01L 25/0655 (2013.01); H01L 25/105 (2013.01); H01L 24/48 (2013.01); H01L 2224/05599 (2013.01); H01L 2224/13 (2013.01); H01L 2224/13099 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/45099 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73207 (2013.01); H01L 2224/73253 (2013.01); H01L 2224/73257 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/85424 (2013.01); H01L 2224/85444 (2013.01); H01L 2225/1023 (2013.01); H01L 2225/1058 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/014 (2013.01); H01L 2924/01006 (2013.01); H01L 2924/01013 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/01033 (2013.01); H01L 2924/01079 (2013.01); H01L 2924/12041 (2013.01); H01L 2924/14 (2013.01); H01L 2924/1433 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/15747 (2013.01); H01L 2924/181 (2013.01);
Abstract

Techniques for fabricating multiple device components. Specifically, techniques for fabricating a stacked package comprising at least one I/C module and a multi-chip package. The multi-chip package includes a plurality of integrated circuit dice coupled to a carrier. The dice are encapsulated such that conductive elements are exposed through the encapsulant. The conductive elements are electrically coupled to the chips. The I/C module comprises an interposer having a plurality of integrated circuit dice disposed thereon. The dice of the I/C module are electrically coupled to the interposer via bondwires. The interposer is configured such that vias are aligned with the conductive elements on the multi-chip package. The multi-chip package and I/C module may be fabricated separately and subsequently coupled together to form a stacked package.


Find Patent Forward Citations

Loading…