The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 10, 2017
Filed:
Aug. 24, 2015
Applicant:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Inventors:
Lee-Chung Lu, Taipei, TW;
Yuan-Te Hou, Hsin-Chu, TW;
Shyue-Shyh Lin, Zhubei, TW;
Li-Chun Tien, Tainan, TW;
Dian-Hau Chen, Hsin-Chu, TW;
Assignee:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/768 (2006.01); H01L 21/311 (2006.01); H01L 23/528 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 21/7681 (2013.01); H01L 21/31144 (2013.01); H01L 21/76816 (2013.01); H01L 21/76877 (2013.01); H01L 23/5283 (2013.01); H01L 23/522 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 2924/0002 (2013.01);
Abstract
An integrated circuit structure includes a semiconductor substrate, and a first metal layer over the semiconductor substrate. The first metal layer has a first minimum pitch. A second metal layer is over the first metal layer. The second metal layer has a second minimum pitch smaller than the first minimum pitch.
Lu, Lee-Chung. (2017). Non-hierarchical metal layers for integrated circuits (U.S. Patent No. 9543193). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9543193
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile