The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 27, 2016
Filed:
Sep. 26, 2014
Yogesh B. Wakchaure, Folsom, CA (US);
David J. Pelster, Longmont, CO (US);
Eric L. Hoffman, Lafayette, CO (US);
Xin Guo, San Jose, CA (US);
Aliasgar S. Madraswala, Folsom, CA (US);
Yogesh B. Wakchaure, Folsom, CA (US);
David J. Pelster, Longmont, CO (US);
Eric L. Hoffman, Lafayette, CO (US);
Xin Guo, San Jose, CA (US);
Aliasgar S. Madraswala, Folsom, CA (US);
INTEL CORPORATION, Santa Clara, CA (US);
Abstract
A page data (e.g., upper page data) received from a host is stored in a transfer buffer of a controller of a solid state drive. Another page data (e.g., lower page data) is read from a non-volatile memory (e.g., a NAND memory) to store in the transfer buffer as an error corrected page data. The error corrected page data and the page data are written to the non-volatile memory. In additional embodiments, a controller loads a page data (e.g., upper page data) received from the host in one or more NAND page buffers. The controller reads another page data (e.g., lower page data) from a NAND memory to store in a transfer buffer as an error corrected page data. The error corrected page data stored in the transfer buffer is loaded to the one or more NAND page buffers.