The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 13, 2016
Filed:
Sep. 27, 2011
Cheng Wang, San Ramon, CA (US);
Youfeng Wu, Palo Alto, CA (US);
Wei-yu Chen, Santa Clara, CA (US);
Bratin Saha, Santa Clara, CA (US);
Ali Reza Adl-tabatabai, San Jose, CA (US);
Cheng Wang, San Ramon, CA (US);
Youfeng Wu, Palo Alto, CA (US);
Wei-Yu Chen, Santa Clara, CA (US);
Bratin Saha, Santa Clara, CA (US);
Ali Reza Adl-Tabatabai, San Jose, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A method and apparatus for efficient and consistent validation/conflict detection in a Software Transactional Memory (STM) system is herein described. A version check barrier is inserted after a load to compare versions of loaded values before and after the load. In addition, a global timestamp (GTS) is utilized to track a latest committed transaction. Each transaction is associated with a local timestamp (LTS) initialized to the GTS value at the start of a transaction. As a transaction commits it updates the GTS to a new value and sets versions of modified locations to the new value. Pending transactions compare versions determined in read barriers to their LTS. If the version is greater than their LTS indicating another transaction has committed after the pending transaction started and initialized the LTS, then the pending transaction validates its read set to maintain efficient and consistent transactional execution.