The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 06, 2016
Filed:
Jun. 30, 2016
Applicant:
Pushkar Ranade, San Jose, CA (US);
Inventor:
Pushkar Ranade, San Jose, CA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/10 (2006.01); H01L 29/78 (2006.01); H01L 29/16 (2006.01); H01L 29/165 (2006.01); H01L 29/20 (2006.01); H01L 29/267 (2006.01); H01L 29/51 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
H01L 29/1054 (2013.01); H01L 29/0653 (2013.01); H01L 29/0847 (2013.01); H01L 29/16 (2013.01); H01L 29/165 (2013.01); H01L 29/20 (2013.01); H01L 29/267 (2013.01); H01L 29/512 (2013.01); H01L 29/517 (2013.01); H01L 29/66636 (2013.01); H01L 29/66795 (2013.01); H01L 29/7848 (2013.01); H01L 29/7851 (2013.01);
Abstract
A method to form a semiconductor structure with an active region and a compatible dielectric layer is described. In one embodiment, a semiconductor structure has a dielectric layer comprised of an oxide of a first semiconductor material, wherein a second (and compositionally different) semiconductor material is formed between the dielectric layer and the first semiconductor material. In another embodiment, a portion of the second semiconductor material is replaced with a third semiconductor material in order to impart uniaxial strain to the lattice structure of the second semiconductor material.