The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 29, 2016
Filed:
Sep. 17, 2013
International Business Machines Corporation, Armonk, NY (US);
Thomas N. Adam, Slingerlands, NY (US);
Kangguo Cheng, Schenectady, NY (US);
Bruce B. Doris, Brewster, NY (US);
Pouya Hashemi, White Plains, NY (US);
Ali Khakifirooz, Mountain View, CA (US);
Alexander Reznicek, Troy, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method of fabricating a semiconductor device is provided that includes providing a material stack that includes a silicon layer, a doped semiconductor layer, and an undoped silicon germanium layer. At least one fin structure is formed from the material stack by etching through the undoped silicon germanium layer, the doped semiconductor layer, and etching a portion of the silicon-containing layer. An isolation region is formed in contact with at least one end of the at least one fin structure. An anodization process removes the doped semiconductor layer of the at least one fin structure to provide a void. A dielectric layer is deposited to fill the void that is present between the silicon layer and the doped semiconductor layer. Source and drain regions are then formed on a channel portion of the at least one fin structure.