The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 22, 2016
Filed:
Jul. 01, 2014
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Ming-Chi Wu, Kaohsiung, TW;
Yu-Lung Yeh, Kaohsiung, TW;
Chieh-Shuo Liang, Kaohsiung, TW;
Shih-Chang Lin, Tainan, TW;
Meng-Yi Wu, Tainan, TW;
Hsing-Chih Lin, Tainan, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;
Abstract
In a method for manufacturing a semiconductor device, a substrate including a gate structure is provided. A source region and a drain region are formed at opposing sides of the gate structure and an implant region for a resistor device is formed in the substrate. Pocket implant regions are formed in the source region and the drain region. A dielectric layer is formed to cover the gate structure and the substrate. A portion of dopants in the pocket implant regions interact with portions of dopants in the source region and the drain region to form lightly doped drain regions above the pocket implant regions. A resistor region of the resistor device is defined on the implant region. A portion of the dielectric layer is removed to form a spacer on a sidewall of the gate structure and a resistor protection dielectric layer on a portion of the implant region.