The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 08, 2016

Filed:

Feb. 13, 2015
Applicant:

Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;

Inventors:

Xiuli Yang, Shanghai, CN;

He-Zhou Wan, Shanghai, CN;

Ming-En Bu, Shan Ghai, CN;

Mu-Jen Huang, Taipei, TW;

Ching-Wei Wu, Nantou County, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 7/00 (2006.01); G11C 8/00 (2006.01); G11C 11/418 (2006.01); H04J 3/06 (2006.01); G11C 11/419 (2006.01);
U.S. Cl.
CPC ...
G11C 11/418 (2013.01); G11C 11/419 (2013.01); H04J 3/0644 (2013.01);
Abstract

In some embodiments, a time division multiplexing (TDM) circuit is configured to receive an external clock signal and generate an internal clock signal that has at least one pulse during a clock cycle of the external clock signal. An address selector is configured to select a current address before a first time within one of the at least one pulse, and select a next address starting from the first time to generate a selected address. An address storage element is configured to receive the selected address from the address selector and provide a passed through or stored address. The provided address is the current address substantially throughout the one of the at least one pulse. A single-port (SP) memory is configured to access at least one SP memory cell at the address provided by the address storage element in response to the internal clock signal.


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