The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 01, 2016
Filed:
Jul. 19, 2013
Applicant:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Inventors:
Assignee:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/00 (2006.01); H01L 23/532 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/53295 (2013.01); H01L 21/76801 (2013.01); H01L 21/76829 (2013.01); H01L 23/522 (2013.01); H01L 23/5226 (2013.01); H01L 24/05 (2013.01); H01L 24/13 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05147 (2013.01); H01L 2224/05166 (2013.01); H01L 2224/05624 (2013.01); H01L 2224/13101 (2013.01); H01L 2224/13147 (2013.01); H01L 2924/13091 (2013.01);
Abstract
An integrated circuit structure includes a substrate, a plurality of low-k dielectric layers over the substrate, a first dielectric layer over the plurality of low-k dielectric layers, and a metal line in the first dielectric layer. A stress tuning dielectric layer is over the first dielectric layer, wherein the stress tuning dielectric layer includes a first opening and a second opening. The metal line extends into the first opening. The second opening has a bottom substantially level with a top surface of the first dielectric layer. A second dielectric layer is over the first dielectric layer.