The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 01, 2016

Filed:

Jun. 24, 2010
Applicants:

Joseph Ervin, Wappingers Falls, NY (US);

Jeffrey B. Johnson, Essex Junction, VT (US);

Kevin Mcstay, Hopewell Junction, NY (US);

Paul C. Parries, Wappingers Falls, NY (US);

Chengwen Pei, Danbury, CT (US);

Geng Wang, Stormville, NY (US);

Yanli Zhang, Essex Junction, VT (US);

Inventors:

Joseph Ervin, Wappingers Falls, NY (US);

Jeffrey B. Johnson, Essex Junction, VT (US);

Kevin McStay, Hopewell Junction, NY (US);

Paul C. Parries, Wappingers Falls, NY (US);

Chengwen Pei, Danbury, CT (US);

Geng Wang, Stormville, NY (US);

Yanli Zhang, Essex Junction, VT (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 21/8242 (2006.01); H01L 21/84 (2006.01); H01L 21/762 (2006.01); H01L 27/108 (2006.01);
U.S. Cl.
CPC ...
H01L 21/84 (2013.01); H01L 21/76237 (2013.01); H01L 27/10847 (2013.01); H01L 27/1203 (2013.01);
Abstract

Semiconductor structures and methods to control bottom corner threshold in a silicon-on-insulator (SOI) device. A method includes doping a corner region of a semiconductor-on-insulator (SOI) island. The doping includes tailoring a localized doping of the corner region to reduce capacitive coupling of the SOI island with an adjacent structure.


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