The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 25, 2016
Filed:
Mar. 10, 2016
Kabushiki Kaisha Toshiba, Minato-ku, JP;
Kiichi Tachi, Kamakura, JP;
Masanobu Shirakawa, Chigasaki, JP;
Masaki Yoshimura, Kawasaki, JP;
Marie Takada, Yokohama, JP;
Yoshikazu Harada, Kawasaki, JP;
KABUSHIKI KAISHA TOSHIBA, Minato-ku, JP;
Abstract
A semiconductor memory device according to an embodiment includes a control circuit, during data write to a memory cell, sequentially executing: an erasing stage in which a threshold value of the memory cell is transitioned into an erase distribution; a preliminary programming stage in which the threshold value is transitioned into a temporal distribution corresponding to write data; and a main programming stage in which the threshold value is transitioned into a program distribution corresponding to the write data, and the control circuit executing a main reading stage, during the data read to a first memory cell, which includes a main reading step of adjusting a read pass voltage to be applied to a neighboring word line based on a magnitude of a threshold value of the neighboring memory cell, and reading whether the first memory cell is an erase level.