The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9461171 B1

PDF
Full Text
Expired
Date of Patent:
Oct. 04, 2016

Filed:

May. 21, 2014
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Ruilong Xie, Niskayuna, NY (US);

Hoon Kim, Clifton Park, NY (US);

Naim Moumen, Clifton Park, NY (US);

Chanro Park, Clifton Park, NY (US);

William J. Taylor, Jr., Clifton Park, NY (US);

Assignee:

GLOBALFOUNDRIES Inc., Grand Cayman, KY;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/417 (2006.01); H01L 29/08 (2006.01); H01L 21/768 (2006.01); H01L 21/285 (2006.01); H01L 23/485 (2006.01); H01L 29/165 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7848 (2013.01); H01L 21/28518 (2013.01); H01L 21/28525 (2013.01); H01L 21/76897 (2013.01); H01L 23/485 (2013.01); H01L 29/0847 (2013.01); H01L 29/41783 (2013.01); H01L 29/665 (2013.01); H01L 29/66545 (2013.01); H01L 29/66628 (2013.01); H01L 29/66636 (2013.01); H01L 21/76805 (2013.01); H01L 29/165 (2013.01);
Abstract

One method disclosed includes, among other things, forming a gate structure above an active region of a semiconductor substrate, performing an epitaxial deposition process to form an epi semiconductor material on the active region in the source/drain region of the device, performing an etching process on the epi semiconductor material to remove a portion of the epi semiconductor material so as to define at least one epi recess in the epi semiconductor material, forming a metal silicide layer on the upper surface of the epi semiconductor material and in the at least one epi recess in the epi semiconductor material, and forming a conductive structure that is conductively coupled to the metal silicide layer.


Find Patent Forward Citations

Xie, Ruilong. (2016). Methods of increasing silicide to epi contact areas and the resulting devices (U.S. Patent No. 9461171). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9461171

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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