The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 2016

Filed:

Mar. 06, 2015
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Stefan Flachowsky, Dresden, DE;

Ralf Illgen, Dresden, DE;

Jan Hoentschel, Dresden, DE;

Assignee:

GLOBALFOUNDRIES Inc., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/51 (2006.01); H01L 21/8234 (2006.01); H01L 29/66 (2006.01); H01L 21/28 (2006.01); H01L 27/088 (2006.01); H01L 29/423 (2006.01); H01L 27/11 (2006.01); H01L 21/311 (2006.01); H01L 21/3065 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0886 (2013.01); H01L 21/28291 (2013.01); H01L 21/31111 (2013.01); H01L 21/823431 (2013.01); H01L 21/823462 (2013.01); H01L 27/1104 (2013.01); H01L 29/42364 (2013.01); H01L 29/511 (2013.01); H01L 29/516 (2013.01); H01L 29/517 (2013.01); H01L 29/518 (2013.01); H01L 29/6684 (2013.01); H01L 21/3065 (2013.01);
Abstract

The present disclosure provides, in a first aspect, a semiconductor device, including a semiconductor substrate and a gate structure formed over the semiconductor substrate, wherein the gate structure comprises a fin and a ferroelectric high-k material formed at least over sidewall surfaces of the fin. Herein, a first thickness defined by a thickness of the ferroelectric high-k material formed over sidewalls of the fin is substantially greater than a second thickness defined by a thickness of the ferroelectric high-k material formed over an upper surface of the fin.


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