The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 13, 2016
Filed:
May. 17, 2014
Forschungszentrum Juelich Gmbh, Juelich, DE;
Rheinisch-westfaelische Technische Hochschule (Rwth) Aachen, Aachen, DE;
Stefan Tappertzhofen, Aachen, DE;
Eike Linn, Wuerselen, DE;
Lutz Nielen, Aachen, DE;
Rainer Waser, Aachen, DE;
Ilia Valov, Aachen, DE;
Forschungszentrum Juelich GmbH, Juelich, DE;
Rheinisch-Westfaelische Technisque Hochschule (RWTH) Aachen, Aachen, DE;
Abstract
A method for reading out a non-volatile memory element having at least two stable states 0 and 1. This memory element comprises at least one resistive memory cell, which encodes the two states 0 and 1 into a state HRS having higher electrical resistance and a state LRS having lower electrical resistance. In the two states 0 and 1, the memory element has differing capacitances C; this difference is used to determine which state is present. A memory element is selected in which a fixed capacitance that is independent of the state of the memory cell is connected in series with the memory cell. A series connection of a resistive memory cell with a fixed capacitance, instead of with a second resistive memory cell, improves the signal strength during capacitive read-out. The second memory cell becomes indispensable for the memory function when the memory element is read out capacitively. Moreover memory elements were developed which combine a field effect transistor or a DRAM structure with a resistive memory cell or an antiserial series connection of such memory cells.