The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 06, 2016

Filed:

Mar. 31, 2014
Applicant:

Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;

Inventors:

Tsung-Yuan Yu, Taipei, TW;

Hao-Yi Tsai, Hsinchu, TW;

Chao-Wen Shih, Hsinchu, TW;

Hung-Yi Kuo, Taipei, TW;

Pi-Lan Chang, Kaohsiung, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 21/768 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76898 (2013.01); H01L 24/05 (2013.01); H01L 24/06 (2013.01); H01L 24/03 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/81 (2013.01); H01L 2224/0345 (2013.01); H01L 2224/03462 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/0557 (2013.01); H01L 2224/05569 (2013.01); H01L 2224/05571 (2013.01); H01L 2224/05572 (2013.01); H01L 2224/05624 (2013.01); H01L 2224/05639 (2013.01); H01L 2224/05644 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/05655 (2013.01); H01L 2224/05684 (2013.01); H01L 2224/06131 (2013.01); H01L 2224/06133 (2013.01); H01L 2224/06134 (2013.01); H01L 2224/06177 (2013.01); H01L 2224/06179 (2013.01); H01L 2224/06515 (2013.01); H01L 2224/131 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/13116 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/16106 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/81815 (2013.01); H01L 2924/351 (2013.01); H01L 2924/3511 (2013.01); H01L 2924/3512 (2013.01); H01L 2924/35121 (2013.01); H01L 2924/381 (2013.01);
Abstract

A semiconductor device includes a first substrate including a surface, and a pad array on the surface of the substrate, wherein the pad array comprises a first type pad and a second type pad located on a same level. The semiconductor device further includes a conductive bump connecting either the first type pad or the second type pad to a second substrate and a via connected a conductive feature at a different level to the first type pad and the via located within a projection area of the first type pad and directly contacting the first type pad. The semiconductor device also has a dielectric in the substrate and directly contacting the second type pad, wherein the second type pad is floated on the dielectric.


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