The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 30, 2016

Filed:

Jul. 11, 2013
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Cheng-Yuan Hsu, Hsinchu, TW;

Zhen Chen, Singapore, SG;

Chi Ren, Singapore, SG;

Ching-Long Tsai, Taipei, TW;

Wei Cheng, Singapore, SG;

Ping Liu, Singapore, SG;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/423 (2006.01); H01L 21/28 (2006.01); H01L 29/66 (2006.01); H01L 29/788 (2006.01); H01L 27/115 (2006.01);
U.S. Cl.
CPC ...
H01L 21/28273 (2013.01); H01L 27/11521 (2013.01); H01L 29/42328 (2013.01); H01L 29/66825 (2013.01); H01L 29/7881 (2013.01);
Abstract

A method for manufacturing a semiconductor device includes the following steps. At first, two gate stack layers are formed on a semiconductor substrate, wherein each of the gate stack layers includes a top surface and two side surfaces. A conductive material layer is deposited to conformally cover the top surface and the two side surfaces of each of the gate stack layers. Then, a cap layer is deposited to conformally cover the conductive material layer. Finally, the cap layer and the conductive material layer above the top surface of each of the gate stack layers are removed to leave the cap layer adjacent to the two side surfaces of each of the gate stack layers and covering a portion of the conductive material layer.


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