The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 23, 2016
Filed:
Aug. 21, 2014
Applicant:
Tokyo Electron Limited, Tokyo, JP;
Inventors:
Assignee:
TOKYO ELECTRON LIMITED, Tokyo, JP;
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/67 (2006.01); H01L 21/02 (2006.01); C23C 16/24 (2006.01); C30B 29/06 (2006.01); C23C 16/455 (2006.01); C23C 16/56 (2006.01); C30B 19/00 (2006.01);
U.S. Cl.
CPC ...
H01L 21/67069 (2013.01); C23C 16/24 (2013.01); C23C 16/45589 (2013.01); C23C 16/56 (2013.01); C30B 29/06 (2013.01); H01L 21/0243 (2013.01); H01L 21/0262 (2013.01); H01L 21/02532 (2013.01); H01L 21/02576 (2013.01); H01L 21/02579 (2013.01); H01L 21/02592 (2013.01); H01L 21/02658 (2013.01); C30B 19/00 (2013.01);
Abstract
A depression filling method for filling a depression of a workpiece including a semiconductor substrate and an insulating film formed on the semiconductor substrate is provided. The depression penetrating the insulating film is configured so as to extend to the semiconductor substrate. The method includes: forming a thin film of a semiconductor material along a wall surface that defines the depression; annealing the workpiece to cause the semiconductor material of the thin film to move toward a bottom of the depression and to form an epitaxial region corresponding to crystals of the semiconductor substrate; and etching the thin film.