The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 16, 2016
Filed:
Oct. 29, 2015
Moaniss Zitouni, Gilbert, AZ (US);
Edouard D. DE Frésart, Tempe, AZ (US);
Pon Sung Ku, Gilbert, AZ (US);
Michael F. Petras, Phoenix, AZ (US);
Ganming Qin, Chandler, AZ (US);
Evgueniy N. Stefanov, Vieille Toulouse, FR;
Dragan Zupac, Chandler, AZ (US);
Moaniss Zitouni, Gilbert, AZ (US);
Edouard D. de Frésart, Tempe, AZ (US);
Pon Sung Ku, Gilbert, AZ (US);
Michael F. Petras, Phoenix, AZ (US);
Ganming Qin, Chandler, AZ (US);
Evgueniy N. Stefanov, Vieille Toulouse, FR;
Dragan Zupac, Chandler, AZ (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A device includes a semiconductor substrate having a surface, a trench in the semiconductor substrate extending vertically from the surface, a body region laterally adjacent the trench, spaced from the surface, having a first conductivity type, and in which a channel is formed during operation, a drift region between the body region and the surface, and having a second conductivity type, a gate structure disposed in the trench alongside the body region, recessed from the surface, and configured to receive a control voltage is applied to control formation of the channel, and a gate dielectric layer disposed along a sidewall of the trench between the gate structure and the body region. The gate structure and the gate dielectric layer have a substantial vertical overlap with the drift region such that electric field magnitudes in the drift region are reduced through application of the control voltage.