The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 02, 2016

Filed:

Mar. 09, 2015
Applicants:

Heejo Chi, Yeoju-gun, KR;

Bartholomew Liao Chung Foh, Singapore, SG;

Sheila Marie L. Alvarez, Singapore, SG;

Zigmund Ramirez Camacho, Singapore, SG;

Dao Nguyen Phu Cuong, Singapore, SG;

Inventors:

HeeJo Chi, Yeoju-gun, KR;

Bartholomew Liao Chung Foh, Singapore, SG;

Sheila Marie L. Alvarez, Singapore, SG;

Zigmund Ramirez Camacho, Singapore, SG;

Dao Nguyen Phu Cuong, Singapore, SG;

Assignee:

STATS ChipPAC Ltd., Singapore, SG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/48 (2006.01); H01L 23/12 (2006.01);
U.S. Cl.
CPC ...
H01L 24/81 (2013.01); H01L 21/481 (2013.01); H01L 23/12 (2013.01); H01L 24/17 (2013.01); H01L 2924/1533 (2013.01);
Abstract

An integrated circuit packaging system and method of manufacture thereof includes: a substrate; a plain trace on the substrate; an insulated trace on the substrate; an insulation layer on the insulated trace, the insulation layer at least partially covers the insulated trace; and a semiconductor device over the substrate, the semiconductor device has a plain bump attached on the plain trace and an inner bump attached on the insulated trace, and the plain bump is mounted adjacent to the insulation layer.


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