The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 12, 2016
Filed:
Oct. 23, 2014
Applicant:
Globalfoundries Inc., Grand Cayman, KY;
Inventors:
Stefan Flachowsky, Dresden, DE;
Jan Hoentschel, Dresden, DE;
Ralf Richter, Radebeul, DE;
Peter Javorka, Radeburg, DE;
Assignee:
GLOBALFOUNDRIES Inc., Grand Cayman, KY;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/00 (2006.01); H01L 29/06 (2006.01); H01L 29/78 (2006.01); H01L 29/40 (2006.01); H01L 29/66 (2006.01); H01L 29/165 (2006.01); H01L 25/065 (2006.01); H01L 29/786 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66818 (2013.01); H01L 29/165 (2013.01); H01L 29/66545 (2013.01); H01L 29/785 (2013.01); H01L 25/0657 (2013.01); H01L 29/0634 (2013.01); H01L 29/42376 (2013.01); H01L 29/78645 (2013.01); H01L 29/78648 (2013.01);
Abstract
The present disclosure provides, in various aspects of the present disclosure, a semiconductor device which includes a semiconductor stack disposed over a surface of a substrate and a gate structure partially formed over an upper surface and two opposing sidewall surfaces of the semiconductor stack, wherein the semiconductor stack includes an alternating arrangement of at least two layers formed by a first semiconductor material and a second semiconductor material which is different from the first semiconductor material.