The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 05, 2016
Filed:
Jul. 28, 2014
Xilinx, Inc., San Jose, CA (US);
Raghunandan Chaware, Sunnyvale, CA (US);
Inderjit Singh, Saratoga, CA (US);
Glenn O'Rourke, Gilroy, CA (US);
Ganesh Hariharan, Santa Clara, CA (US);
XILINX, INC., San Jose, CA (US);
Abstract
A method for providing charge protection to a die during formation of an integrated circuit, includes bonding the die to an interposer to form an unprotected stacked silicon component; encapsulating the unprotected stacked silicon component with a mold compound to cover at least a top surface of the die; grinding the mold compound to reduce a thickness of the mold compound; bonding a carrier wafer to the mold compound; removing the carrier wafer from the mold compound; and removing the mold compound from the top surface of the die after the carrier wafer is removed from the mold compound, to expose the top surface of the die.