The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 21, 2016

Filed:

Feb. 27, 2014
Applicant:

Stats Chippac, Ltd., Singapore, SG;

Inventors:

DaeSik Choi, Seoul, KR;

OhHan Kim, Kyonggi-do, KR;

SungWon Cho, Kyoung-gi-Do, KR;

Assignee:

STATS ChipPAC Pte. Ltd., Singapore, SG;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 23/52 (2006.01); H01L 23/522 (2006.01); H01L 21/56 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/522 (2013.01); H01L 21/565 (2013.01); H01L 23/49811 (2013.01); H01L 24/11 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/81 (2013.01); H01L 24/82 (2013.01); H01L 24/03 (2013.01); H01L 24/05 (2013.01); H01L 2224/0345 (2013.01); H01L 2224/0346 (2013.01); H01L 2224/0347 (2013.01); H01L 2224/03452 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05555 (2013.01); H01L 2224/05572 (2013.01); H01L 2224/05611 (2013.01); H01L 2224/05624 (2013.01); H01L 2224/05639 (2013.01); H01L 2224/05644 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/05655 (2013.01); H01L 2224/05666 (2013.01); H01L 2224/05671 (2013.01); H01L 2224/1132 (2013.01); H01L 2224/1146 (2013.01); H01L 2224/11334 (2013.01); H01L 2224/11831 (2013.01); H01L 2224/11903 (2013.01); H01L 2224/11906 (2013.01); H01L 2224/13011 (2013.01); H01L 2224/13012 (2013.01); H01L 2224/13019 (2013.01); H01L 2224/13022 (2013.01); H01L 2224/13082 (2013.01); H01L 2224/13083 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/13113 (2013.01); H01L 2224/13116 (2013.01); H01L 2224/13124 (2013.01); H01L 2224/13139 (2013.01); H01L 2224/13144 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/13155 (2013.01); H01L 2224/13164 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/81193 (2013.01); H01L 2224/81201 (2013.01); H01L 2224/81385 (2013.01); H01L 2224/81815 (2013.01); H01L 2224/83104 (2013.01); H01L 2224/94 (2013.01); H01L 2924/01322 (2013.01); H01L 2924/12041 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/1306 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/181 (2013.01);
Abstract

A semiconductor device has a substrate and first conductive pads formed over the substrate. An interconnect surface area of the first conductive pads is expanded by forming a plurality of recesses into the first conductive pads. The recesses can be an arrangement of concentric rings, arrangement of circular recesses, or arrangement of parallel linear trenches. Alternatively, the interconnect surface area of the first conductive pads is expanded by forming a second conductive pad over the first conductive pad. A semiconductor die has a plurality of interconnect structures formed over a surface of the semiconductor die. The semiconductor die is mounted to the substrate with the interconnect structures contacting the expanded interconnect surface area of the first conductive pads to increase bonding strength of the interconnect structure to the first conductive pads. A mold underfill material is deposited between the semiconductor die and substrate.


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