The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 21, 2016

Filed:

Mar. 06, 2015
Applicant:

Industrial Technology Research Institute, Hsinchu, TW;

Inventors:

Wen-Wei Shen, Hsinchu, TW;

Kuan-Neng Chen, Hsinchu, TW;

Cheng-Ta Ko, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/40 (2006.01); H01L 23/48 (2006.01); H01L 21/768 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 23/481 (2013.01); H01L 21/76898 (2013.01); H01L 25/0657 (2013.01); H01L 2225/06541 (2013.01);
Abstract

A semiconductor device includes a substrate, a redistribution layer, a plurality of through-silicon vias (TSVs), and a plating seed layer. The substrate has a first surface and a second surface opposite to each other, and a plurality of cavities. The redistribution layer is disposed on the first surface, and the TSVs are respectively disposed in the cavities. The plating seed layer is disposed between the inner wall of each of the cavities and the corresponding TSVs. The anti-oxidation layer is disposed between the plating seed layer and the corresponding TSVs. The buffer layer covers the first surface and exposes the redistribution layers. Furthermore, a manufacturing method and a stacking structure of the semiconductor device are also provided.


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