The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 14, 2016
Filed:
Sep. 11, 2014
Applicant:
Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;
Inventors:
Ping-Chung Liu, Taipei, TW;
Wei-Chiang Hung, Changhua County, TW;
Hsiang-Yu Tsai, Hsinchu, TW;
Kuo Hui Chang, Taoyuan County, TW;
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu, TW;
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 29/78 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 21/283 (2006.01); H01L 21/324 (2006.01); H01L 21/311 (2006.01); H01L 21/302 (2006.01); H01L 21/31 (2006.01); H01L 21/265 (2006.01); H01L 21/8238 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7843 (2013.01); H01L 21/265 (2013.01); H01L 21/283 (2013.01); H01L 21/302 (2013.01); H01L 21/31 (2013.01); H01L 21/31116 (2013.01); H01L 21/324 (2013.01); H01L 21/3247 (2013.01); H01L 21/823814 (2013.01); H01L 21/823828 (2013.01); H01L 21/823864 (2013.01); H01L 29/4232 (2013.01); H01L 29/6653 (2013.01); H01L 29/6656 (2013.01); H01L 29/7847 (2013.01);
Abstract
A semiconductor structure includes a semiconductor substrate; a gate stack on the semiconductor substrate; and a stress memorization technology (SMT) sidewall spacer over a sidewall of the gate stack. The gate stack includes a gate dielectric layer over the semiconductor substrate and a gate electrode over the gate dielectric layer. The SMT sidewall spacer provides a stress for a channel region beneath the gate stack.