The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 14, 2016
Filed:
Mar. 18, 2014
Applicant:
Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;
Inventors:
Nitesh Katta, Hsinchu, TW;
Jerry Chang-Jui Kao, Taipei, TW;
Chin-Shen Lin, Taipei, TW;
Yi-Chuin Tsai, Pintung Country, TW;
Chien-Ju Chao, New Taipei, TW;
Kuo-Nan Yang, Hsinchu, TW;
Chung-Hsing Wang, Hsinchi, TW;
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu, TW;
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5081 (2013.01); G06F 17/5031 (2013.01); G06F 17/5072 (2013.01); G06F 17/5077 (2013.01); G06F 17/5068 (2013.01);
Abstract
In some embodiments, in a method, cell layouts of a plurality of cells are received. For each cell, a respective constraint that affects a geometry of an interconnect to be coupled to an output pin of the cell in a design layout is determined based on a geometry of the output pin of the cell in the cell layout.