The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 07, 2016

Filed:

Apr. 16, 2014
Applicant:

Globalfoundries Singapore Pte. Ltd., Singapore, SG;

Inventors:

Shyue Seng Tan, Singapore, SG;

Eng Huat Toh, Singapore, SG;

Jeoung Mo Koo, Singapore, SG;

Danny Shum, Poughkeepsie, NY (US);

Elgin Kiok Boone Quek, Singapore, SG;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/788 (2006.01); H01L 29/423 (2006.01); H01L 27/115 (2006.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
H01L 29/42324 (2013.01); G11C 16/0425 (2013.01); H01L 27/11558 (2013.01); H01L 29/7881 (2013.01); H01L 29/7883 (2013.01); H01L 29/7885 (2013.01);
Abstract

Embodiments of a simple and cost-free multi-time programmable (MTP) structure for non-volatile memory cells are presented. A non-volatile MTP memory cell includes a substrate, first and second wells disposed in the substrate, a first transistor having a select gate and a second transistor having a floating gate adjacent one another and disposed over the second well and sharing a diffusion region. The memory cell further includes a control gate disposed over the first well. The control gate is coupled to the floating gate and the control and floating gates include the same gate layer extending across the first and the second wells.


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