The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 24, 2016

Filed:

Sep. 03, 2014
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Peter Javorka, Radeburg, DE;

Stefan Flachowsky, Dresden, DE;

Gerd Zschätzsch, Dresden, DE;

Assignee:

GLOBALFOUNDRIES Inc., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 27/092 (2006.01); H01L 29/78 (2006.01); H01L 29/49 (2006.01); H01L 29/66 (2006.01); H01L 21/8238 (2006.01); H01L 21/02 (2006.01); H01L 21/308 (2006.01); H01L 21/311 (2006.01); H01L 27/06 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0922 (2013.01); H01L 21/02532 (2013.01); H01L 21/308 (2013.01); H01L 21/31105 (2013.01); H01L 21/8238 (2013.01); H01L 21/823814 (2013.01); H01L 21/823835 (2013.01); H01L 27/0629 (2013.01); H01L 29/4975 (2013.01); H01L 29/665 (2013.01); H01L 29/6656 (2013.01); H01L 29/66545 (2013.01); H01L 29/7848 (2013.01);
Abstract

The present disclosure provides a method of forming a semiconductor device structure with selectively fabricating semiconductor device structures having fully silicided (FuSi) gates and partially silicided gates. In aspects of the present disclosure, a semiconductor device structure with a first semiconductor device and a second semiconductor device is provided, wherein each of the first and second semiconductor devices includes a gate structure over an active region, each of the gate structures having a gate electrode material and a gate dielectric material. The gate electrode material of the first semiconductor device is recessed, resulting in a recessed first gate electrode material which is fully silicided during a subsequent silicidation process. On the gate electrode material of the second semiconductor device, a silicide portion is formed during the silicidation process.


Find Patent Forward Citations

Loading…