The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 24, 2016
Filed:
Sep. 25, 2014
Applicant:
Qualcomm Incorporated, San Diego, CA (US);
Assignee:
QUALCOMM Incorporated, San Diego, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/8238 (2006.01); H01L 27/12 (2006.01); H01L 21/84 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/165 (2006.01); H01L 29/10 (2006.01); H01L 29/47 (2006.01); H01L 21/28 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823814 (2013.01); H01L 21/28026 (2013.01); H01L 21/823828 (2013.01); H01L 21/84 (2013.01); H01L 27/1203 (2013.01); H01L 27/1211 (2013.01); H01L 29/1054 (2013.01); H01L 29/165 (2013.01); H01L 29/42376 (2013.01); H01L 29/47 (2013.01); H01L 29/66545 (2013.01); H01L 29/66621 (2013.01); H01L 29/66628 (2013.01); H01L 29/66636 (2013.01); H01L 29/7834 (2013.01);
Abstract
A complementary metal-oxide-semiconductor (CMOS) device and methods of formation thereof are disclosed. In a particular example, a method of forming a CMOS device includes forming a first layer on an extension layer of a wafer, forming a first gate on a portion of the first layer, and forming an expansion region proximate to the extension layer. The method also includes removing a portion of the first gate to create a cavity and removing a portion of the first layer to extend the cavity to the extension layer.