The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 24, 2016

Filed:

Nov. 27, 2012
Applicants:

Yibin Huang, Shanghai, CN;

Winnie Liu, Shanghai, CN;

Inventors:

Yibin Huang, Shanghai, CN;

Winnie Liu, Shanghai, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G03F 9/00 (2006.01);
U.S. Cl.
CPC ...
G03F 9/7049 (2013.01); G03F 9/7003 (2013.01);
Abstract

An alignment method includes dividing a wafer into a plurality of regions including a first region and a second region, and each region contains a plurality chip areas. The method also includes obtaining alignment offset values for the first region, and determining a first alignment compensation equation for the first region. The method also includes obtaining alignment offset values for the second region, and determining a second alignment compensation equation for the second region. Further, the method includes determining whether a chip area to be exposed is in the first region or the second region, when the chip area is in the first region, using the first alignment compensation equation to adjust alignment of the wafer and, when the chip area is in the second region, using the second alignment compensation equation to adjust the alignment of the wafer.


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