The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 10, 2016
Filed:
Mar. 09, 2012
Khaldoon S. Abugharbieh, Happy Valley, OR (US);
Gregory Meredith, San Francisco, CA (US);
Christopher P. Wyland, Livermore, CA (US);
Paul Y. Wu, Saratoga, CA (US);
Henley Liu, San Jose, CA (US);
Sanjiv Stokes, Los Altos, CA (US);
Yong Wang, Saratoga, CA (US);
Khaldoon S. Abugharbieh, Happy Valley, OR (US);
Gregory Meredith, San Francisco, CA (US);
Christopher P. Wyland, Livermore, CA (US);
Paul Y. Wu, Saratoga, CA (US);
Henley Liu, San Jose, CA (US);
Sanjiv Stokes, Los Altos, CA (US);
Yong Wang, Saratoga, CA (US);
XILINX, INC., San Jose, CA (US);
Abstract
An embodiment of an apparatus to reduce supply voltage noise with capacitors of an interposer of a stacked die is disclosed. In this embodiment, an interposer is coupled to a first integrated circuit die using a first plurality of interconnects. A substrate is coupled to the interposer using a second plurality of interconnects. The substrate includes a supply voltage plane and a ground plane, each of which is coupled to the first integrated circuit die using the second plurality of interconnects, the interposer, and the first plurality of interconnects. The interposer includes capacitors coupled in parallel using the supply voltage plane, the ground plane, and the second plurality of interconnects, where capacitance from capacitors of the interposer is provided to the first integrated circuit die using the supply voltage plane and the ground plane of the substrate.