The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 10, 2016

Filed:

Oct. 28, 2010
Applicants:

Reza A. Pagaila, Singapore, SG;

Yaojian Lin, Singapore, SG;

Jun MO Koo, Singapore, SG;

Inventors:

Reza A. Pagaila, Singapore, SG;

Yaojian Lin, Singapore, SG;

Jun Mo Koo, Singapore, SG;

Assignee:

STATS ChipPAC, Ltd., Singapore, SG;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 23/31 (2006.01); H01L 23/13 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2006.01); H01L 21/56 (2006.01); H01L 23/498 (2006.01); H01L 25/03 (2006.01); H01L 25/10 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3128 (2013.01); H01L 23/13 (2013.01); H01L 24/97 (2013.01); H01L 25/0657 (2013.01); H01L 21/561 (2013.01); H01L 23/49827 (2013.01); H01L 25/03 (2013.01); H01L 25/105 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/97 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06548 (2013.01); H01L 2225/06568 (2013.01); H01L 2924/014 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/01047 (2013.01); H01L 2924/01073 (2013.01); H01L 2924/01074 (2013.01); H01L 2924/01079 (2013.01); H01L 2924/01322 (2013.01); H01L 2924/12041 (2013.01); H01L 2924/1306 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/1515 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/15321 (2013.01); H01L 2924/15331 (2013.01); H01L 2924/181 (2013.01); H01L 2924/18161 (2013.01);
Abstract

A semiconductor substrate has a plurality of different size recesses formed in the substrate to provide a stepped interposer. A conductive via can be formed through the stepped interposer. An insulating layer follows a contour of the stepped interposer. A conductive layer is formed over the insulating layer following the contour of the stepped interposer. A first semiconductor die is partially disposed in a first recess and electrically connected to the conductive layer. A second semiconductor die is partially disposed in a second recess and electrically connected to the conductive layer. The first semiconductor die is electrically connected to the second semiconductor die through the conductive layer. The first and second semiconductor die can be flipchip type semiconductor die. An encapsulant is deposited over the first and second semiconductor die. A portion of the stepped interposer can be removed to reduce thickness.


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