The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 03, 2016

Filed:

Sep. 09, 2014
Applicant:

Hermes-microvision, Inc., Hsinchu, TW;

Inventors:

Steve Lin, San Jose, CA (US);

Wei Fang, Milpitas, CA (US);

Eric Ma, San Jose, CA (US);

Zhonghua Dong, Sunnyvale, CA (US);

Jon Chiang, Beaventon, OR (US);

Yan Zhao, San Jose, CA (US);

Chester Kuo, Taipei, TW;

Zhongwei Chen, San Jose, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01J 37/26 (2006.01); H01L 21/00 (2006.01); G03F 7/00 (2006.01); H01L 21/66 (2006.01); G03F 7/20 (2006.01); G03F 1/86 (2012.01);
U.S. Cl.
CPC ...
H01L 22/12 (2013.01); G03F 1/86 (2013.01); G03F 7/7065 (2013.01); H01J 2237/103 (2013.01); H01J 2237/221 (2013.01); H01J 2237/2817 (2013.01);
Abstract

A method for identifying, inspecting, and reviewing all hot spots on a specimen is disclosed by using at least one SORIL e-beam tool. A full die on a semiconductor wafer is scanned by using a first identification recipe to obtain a full die image of that die and then design layout data is aligned and compared with the full die image to identify hot spots on the full die. Threshold levels used to identify hot spots can be varied and depend on the background environments close thereto, materials of the specimens, defect types, and design layout data. A second recipe is used to selectively inspect locations of all hot spots to identify killers, and then killers can be reviewed with a third recipe.


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