The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 19, 2016
Filed:
Oct. 28, 2014
Stmicroelectronics SA, Montrouge, FR;
Stmicroelectronics (Crolles 2) Sas, Crolles, FR;
Stmicroelectronics, Inc., Coppell, TX (US);
Olivier Nier, Varces, FR;
Denis Rideau, Grenoble, FR;
Pierre Morin, Albany, NY (US);
Emmanuel Josse, La Motte Servolex, FR;
STMicroelectronics SA, Montrouge, FR;
STMicroelectronics (Crolles 2) SAS, Crolles, FR;
STMicroelectronics, Inc., Coppell, TX (US);
Abstract
One or more embodiments of the disclosure concerns a method of forming a stressed semiconductor layer involving: forming, in a surface of a semiconductor structure having a semiconductor layer in contact with an insulator layer, at least two first trenches in a first direction; introducing, via the at least two first trenches, a stress in the semiconductor layer and temporally decreasing, by annealing, the viscosity of the insulator layer; and extending the depth of the at least two first trenches to form first isolation trenches in the first direction delimiting a first dimension of at least one transistor to be formed in the semiconductor structure.