The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 12, 2016

Filed:

Jun. 04, 2014
Applicant:

Shinko Electric Industries Co., Ltd., Nagano-ken, JP;

Inventors:

Takayuki Kiwanami, Nagano, JP;

Junji Sato, Nagano, JP;

Katsuya Fukase, Nagano, JP;

Assignee:

Shinko Electric Industries Co., Ltd., Nagano-shi, Nagano-ken, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/16 (2006.01); H05K 1/18 (2006.01); H05K 3/46 (2006.01); H05K 1/11 (2006.01);
U.S. Cl.
CPC ...
H05K 1/185 (2013.01); H05K 1/182 (2013.01); H05K 3/4697 (2013.01); H05K 1/113 (2013.01); H05K 1/18 (2013.01); H05K 3/4602 (2013.01); H05K 3/4644 (2013.01); H05K 2201/10636 (2013.01); Y02P 70/611 (2015.11);
Abstract

A wiring substrate includes a core, a first wiring layer formed on a first surface of the core, a second wiring layer formed on a second surface of the core, and an electronic component partially accommodated in the cavity and including a projected portion projected from the first opening of the core. A first insulating layer covers a side surface of the electronic component and the first surface of the core and fills a portion of the cavity. A second insulating layer covers the first insulating layer. A third insulating layer covers the second surface of the core. The remainder of the cavity that is not filled with the first insulating layer is filled with the third insulating layer.


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