The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 12, 2016
Filed:
Apr. 06, 2015
Applicant:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Inventors:
Assignee:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/20 (2006.01); H01L 49/02 (2006.01); H01L 23/522 (2006.01); H01L 27/08 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 28/40 (2013.01); H01L 21/76802 (2013.01); H01L 21/76877 (2013.01); H01L 23/5223 (2013.01); H01L 27/0805 (2013.01); H01L 28/60 (2013.01); H01L 2924/0002 (2013.01);
Abstract
A method for forming a semiconductor device includes forming a capacitor bottom plate and a metal interconnect feature on a substrate. A dielectric layer having a predetermined thickness is then formed. The dielectric layer has a first portion overlying the capacitor bottom plate and a second portion overlying the metal interconnect feature. A thickness of the first portion of the dielectric layer is adjusted by either reducing the thickness or depositing additional dielectric material. A capacitor top plate is formed over the first portion of the dielectric layer.