The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9305771 B1

PDF
Full Text
Expired
Date of Patent:
Apr. 05, 2016

Filed:

Dec. 20, 2013
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Shakuntala Sundararajan, Hillsboro, OR (US);

Nadia M. Rahhal-Orabi, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/302 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02063 (2013.01);
Abstract

An embodiment includes a method comprising: etching a material to expose a metal component in a metal layer, which is located on a substrate, while the substrate is in an etch chamber that is under vacuum; and performing an ash process on the metal component while the substrate is still in the etch chamber that is still under vacuum; wherein the material includes at least one of a dielectric and a mask and the metal component includes at least one of an interconnect, a via, and a contact. Other embodiments are described herein.


Find Patent Forward Citations

Sundararajan, Shakuntala. (2016). Prevention of metal loss in wafer processing (U.S. Patent No. 9305771). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9305771

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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