The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 29, 2016
Filed:
Dec. 31, 2010
Xing Wei, Shanghai, CN;
Zhongdang Wang, Shanghai, CN;
Fei YE, Shanghai, CN;
Gongbai Cao, Shanghai, CN;
Chenglu Lin, Shanghai, CN;
Miao Zhang, Shanghai, CN;
Xi Wang, Shanghai, CN;
Xing Wei, Shanghai, CN;
Zhongdang Wang, Shanghai, CN;
Fei Ye, Shanghai, CN;
Gongbai Cao, Shanghai, CN;
Chenglu Lin, Shanghai, CN;
Miao Zhang, Shanghai, CN;
Xi Wang, Shanghai, CN;
SHANGHAI SIMGUI TECHNOLOGY CO. LTD., Shanghai, CN;
SHANGHAI INSTITUTE OF MICROSYSTEM AND INFORMATION TECHNOLOGY, CHINESE ACADEMY OF SCIENCES, Shanghai, CN;
Abstract
A method for preparing a semiconductor substrate with an buried insulating layer by a guttering process, includes the following steps: providing a device substrate and a supporting substrate; forming an insulating layer on a surface of the device substrate; performing a heating treatment on the device substrate, so as to form a denuded zone on the surface of the device substrate; bonding the device substrate having the insulating layer with the supporting substrate, such that the insulating layer is sandwiched between the device substrate and the supporting substrate; annealing and reinforcing a bonding interface, such that an adherence level of the bonding interface meets requirements in the following chamfering grinding, thinning and polishing processes; performing the chamfering grinding, thinning and polishing processes on the device substrate which is bonded.