The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 29, 2016

Filed:

Sep. 07, 2012
Applicants:

Upendra Ummethala, Cupertino, CA (US);

Marek Zywno, San Jose, CA (US);

Layton Hale, Castro Valley, CA (US);

Inventors:

Upendra Ummethala, Cupertino, CA (US);

Marek Zywno, San Jose, CA (US);

Layton Hale, Castro Valley, CA (US);

Assignee:

KLA-Tencor Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G03F 7/20 (2006.01); H01L 21/68 (2006.01);
U.S. Cl.
CPC ...
G03F 7/70758 (2013.01); G03F 7/70725 (2013.01); G03F 7/70775 (2013.01); H01L 21/68 (2013.01);
Abstract

A wafer stage system with reciprocating wafer stage actuation control may include a wafer stage, a motor configured to actuate the wafer stage in a first and/or second direction along an axis, a first reciprocating mechanism configured to decelerate the wafer stage after the wafer stage is actuated to a desired position in the first direction, the first reciprocating mechanism configured to store energy captured while decelerating the wafer stage in the first direction, the first reciprocating mechanism configured to accelerate the wafer stage in the second direction, and a second reciprocating mechanism configured to decelerate the wafer stage after the wafer stage is actuated to a desired position in the second direction, the second reciprocating mechanism configured to store energy captured while decelerating the wafer stage in the second direction, the second reciprocating mechanism further configured to accelerate the wafer stage in the first direction.


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