The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 22, 2016
Filed:
Oct. 30, 2014
Cadence Design Systems, Inc., San Jose, CA (US);
Beshara Elmufdi, San Jose, CA (US);
Viktor Salitrennik, Berkeley, CA (US);
Mitchell G. Poplack, San Jose, CA (US);
CADENCE DESIGN SYSTEMS INC., San Jose, CA (US);
Abstract
A method and system of providing additional lookup tables in an emulation processor cluster of an emulation chip of a hardware functional verification system is provided. An indirection table may be used within the processor cluster to provide the commonly-used function tables for the lookup tables (LUTs). The indirection table may be indexed according to a smaller portion of the standard LUT function table provided by an instruction than otherwise needed. The unused function table bits in the instruction may then be used for other purposes, including providing functionality to one or more extra LUTs of the processor cluster, whose function tables may be provided from another indirection table provided for that purpose. Additional processing capacity may thereby be provided for the cluster with a small amount of additional overhead within the emulation chip, while still providing the full range of function tables of the LUTs.