The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 15, 2016

Filed:

Jul. 19, 2013
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Shi-Wei Chang, Hsinchu, TW;

Hong-Chen Cheng, Hsinchu, TW;

Chien-Chi Tien, Hsinchu, TW;

Li-Chun Tien, Tainan, TW;

Kuo-Hua Pan, Hsinchu, TW;

Jhon-Jhy Liaw, Hsinchu County, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/115 (2006.01); H01L 27/112 (2006.01); G11C 17/10 (2006.01);
U.S. Cl.
CPC ...
H01L 27/115 (2013.01); G11C 17/10 (2013.01); H01L 27/1122 (2013.01);
Abstract

A semiconductor memory cell array is disclosed that includes a memory cell unit. The memory cell unit includes an active region, a first transistor, a second transistor, a gate structure, and an interconnect. The first transistor and the second transistor are formed on the active region. The gate structure is formed on the active region and between the first transistor and the second transistor. The interconnect connects the gate structure and at least one of sources of the first transistor and the second transistor to a power line.


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