The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 15, 2016

Filed:

Feb. 21, 2014
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Ru-Shang Hsiao, Jhubei, TW;

Cing-Yao Chan, Keelung, TW;

Chun-Ying Wang, Tainan, TW;

Jen-Pan Wang, Tainan, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/324 (2006.01); H01L 29/66 (2006.01); H01L 21/265 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 21/324 (2013.01); H01L 21/265 (2013.01); H01L 29/66477 (2013.01); H01L 29/7847 (2013.01);
Abstract

A method includes forming a dummy gate stack over a semiconductor substrate, removing the dummy gate stack to form a recess, and implanting a portion of the semiconductor substrate through the recess. During the implantation, an amorphous region is formed from the portion of the semiconductor substrate. The method further includes forming a strained capping layer, wherein the strained capping layer extends into the recess. An annealing is performed on the amorphous region to re-crystallize the amorphous region. The strained capping layer is then removed.


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