The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 15, 2016
Filed:
May. 23, 2014
Globalfoundries, Inc., Grand Cayman, KY (US);
Yi Zou, Foster City, CA (US);
Wei-Long Wang, Clifton Park, NY (US);
Azat Latypov, San Jose, CA (US);
Tamer Coskun, San Jose, CA (US);
GLOBALFOUNDRIES, INC., Grand Cayman, KY;
Abstract
Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes generating a photomask for forming a DSA directing pattern overlying a semiconductor substrate. The DSA directing pattern is configured to guide a self-assembly material deposited thereon that undergoes directed self-assembly (DSA) to form a DSA pattern. Generating the photomask includes identifying placement of DSA target patterns in a design layout. The DSA target patterns are grouped into groups including a first group and a first group boundary is defined around the first group. The method further includes determining if a neighboring DSA target pattern to the first group boundary is at least a predetermined minimal keep-away distance from an adjacent DSA target pattern that is within the first group boundary. The method also includes determining if the DSA target patterns in the first group are DSA compatible. An output mask pattern is generated using the first group boundary.