The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 01, 2016

Filed:

Jul. 31, 2015
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Yu Chao Lin, Hsin-Chu, TW;

Tzu-Yen Hsieh, Taipei, TW;

Ming-Chia Tai, Zhubei, TW;

Chao-Cheng Chen, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/3213 (2006.01); H01L 21/311 (2006.01); H01L 21/28 (2006.01); H01L 21/02 (2006.01); H01L 21/3105 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66795 (2013.01); H01L 21/0217 (2013.01); H01L 21/02164 (2013.01); H01L 21/28035 (2013.01); H01L 21/31051 (2013.01); H01L 21/31133 (2013.01); H01L 21/31144 (2013.01); H01L 21/32136 (2013.01); H01L 21/32139 (2013.01); H01L 29/6656 (2013.01); H01L 29/66545 (2013.01);
Abstract

Methods for forming a semiconductor device and a FinFET device are disclosed. A method comprises forming a dummy gate electrode layer over a substrate, the dummy gate electrode layer having a first height, forming a first etch stop layer on the dummy gate electrode layer, forming a first hard mask layer on the first etch stop layer, and patterning the first hard mask layer. The method further comprises patterning the first etch stop layer to align with the patterned first hard mask layer, and patterning the gate electrode layer to form a dummy gate electrode, the dummy gate electrode aligning with the patterned first etch stop layer, wherein after the patterning the gate electrode layer the first hard mask layer has a vertical sidewall of a second height, the second height being less than the first height, and the first hard mask layer having a rounded top surface.


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