The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 23, 2016
Filed:
Jul. 07, 2014
Applicant:
Chipmos Technologies Inc., Hsinchu, TW;
Inventor:
Tsung-Jen Liao, Hsinchu, TW;
Assignee:
ChipMOS Technologies Inc., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/00 (2006.01); H01L 23/31 (2006.01); H01L 23/433 (2006.01); H01L 23/538 (2006.01); H01L 23/64 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3114 (2013.01); H01L 23/4334 (2013.01); H01L 23/49822 (2013.01); H01L 23/5389 (2013.01); H01L 23/645 (2013.01); H01L 23/3128 (2013.01); H01L 23/49816 (2013.01); H01L 2224/18 (2013.01); H01L 2924/0002 (2013.01);
Abstract
A chip package structure is provided. The chip package structure includes a chip, at least one inducting coil, a molding compound and a redistribution circuit layer. The chip includes an active surface, a back surface opposite to the active surface. The inducting coil is disposed around a periphery region of the chip. The molding compound covers the chip and the periphery region and exposes the active surface. The inducting coil is disposed at the molding compound. The redistribution circuit layer covers the active surface, part of the molding compound and part of the inducting coil, and electrically connects the chip.