The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 16, 2016

Filed:

Sep. 18, 2013
Applicant:

Globalfoundries Singapore Pte. Ltd., Singapore, SG;

Inventors:

Tian-Lin Chang, Singapore, SG;

Jianfang Liang, Singapore, SG;

Aaron Chen, Singapore, SG;

Yew Tuck Clament Chow, Singapore, SG;

Fan Zhang, Singapore, SG;

Juan Boon Tan, Singapore, SG;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/311 (2006.01); H01L 21/768 (2006.01); H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76804 (2013.01); H01L 21/31116 (2013.01); H01L 21/31144 (2013.01); H01L 23/481 (2013.01); H01L 2924/0002 (2013.01);
Abstract

Semiconductor devices and methods for forming a semiconductor device are presented. The method includes providing a substrate having a device component with a contact region. A contact dielectric layer is formed on the substrate, covering the substrate and device component. The contact dielectric layer includes a lower contact dielectric layer, an intermediate contact dielectric etch stop layer formed on the lower contact dielectric layer, and an upper contact dielectric layer formed on the intermediate contact dielectric etch stop layer. A contact opening is formed through the contact dielectric layer. The contact opening has an upper contact sidewall profile in the upper contact dielectric layer and a lower tapered contact sidewall profile in the lower contact dielectric layer. The tapered sidewall profile prevents shorting with the device component.


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