The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 09, 2016
Filed:
Aug. 22, 2013
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Aleksandar Aleksov, Chandler, AZ (US);
Vladimir Noveski, Chandler, AZ (US);
Sujit Sharan, Chandler, AZ (US);
Shankar Ganapathysubramanian, Phoenix, AZ (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05H 1/02 (2006.01); H05K 1/02 (2006.01); H01L 21/48 (2006.01); H01L 23/15 (2006.01); H01L 23/498 (2006.01); H05K 3/46 (2006.01); H05K 1/03 (2006.01); H05K 3/06 (2006.01); H05K 3/10 (2006.01); H05K 3/20 (2006.01); H05K 3/38 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0201 (2013.01); H01L 21/4807 (2013.01); H01L 23/15 (2013.01); H01L 23/49822 (2013.01); H01L 23/49827 (2013.01); H05K 3/4617 (2013.01); H05K 3/4629 (2013.01); H01L 2924/0002 (2013.01); H01L 2924/09701 (2013.01); H05K 1/0306 (2013.01); H05K 3/06 (2013.01); H05K 3/107 (2013.01); H05K 3/205 (2013.01); H05K 3/388 (2013.01); H05K 3/4647 (2013.01); H05K 2201/0175 (2013.01); H05K 2201/0187 (2013.01); H05K 2201/0376 (2013.01); H05K 2201/096 (2013.01); H05K 2201/09881 (2013.01); H05K 2203/0733 (2013.01); Y10T 29/49126 (2015.01); Y10T 29/49155 (2015.01); Y10T 29/49156 (2015.01); Y10T 29/49165 (2015.01);
Abstract
A layer or layers for use in package substrates and die spacers are described. The layer or layers include a plurality of ceramic wells lying within a plane and separated by metallic vias. Recesses within the ceramic wells are occupied by a dielectric filler material.