The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 09, 2016

Filed:

Aug. 17, 2012
Applicants:

Chien-hsien Tseng, Hsin-Chu, TW;

Shou-gwo Wuu, Hsin-Chu, TW;

Chia-chan Chen, Zhubei, TW;

Kuo-yu Wu, Zhubei, TW;

Dao-hong Yang, Xihu Township, TW;

Ming-hao Chung, Taipei, TW;

Inventors:

Chien-Hsien Tseng, Hsin-Chu, TW;

Shou-Gwo Wuu, Hsin-Chu, TW;

Chia-Chan Chen, Zhubei, TW;

Kuo-Yu Wu, Zhubei, TW;

Dao-Hong Yang, Xihu Township, TW;

Ming-Hao Chung, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 27/146 (2006.01);
U.S. Cl.
CPC ...
H01L 27/14603 (2013.01); H01L 27/1461 (2013.01); H01L 27/1463 (2013.01); H01L 27/14609 (2013.01); H01L 27/14612 (2013.01);
Abstract

A device includes a semiconductor substrate, a well region in the semiconductor substrate, and a Metal-Oxide-Semiconductor (MOS) device. The MOS device includes a gate dielectric overlapping the well region, a gate electrode over the gate dielectric, and a source/drain region in the well region. The source/drain region and the well region are of opposite conductivity types. An edge of the first source drain region facing away from the gate electrode is in contact with the well region to form a junction isolation.


Find Patent Forward Citations

Loading…