The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 09, 2016

Filed:

Feb. 18, 2014
Applicants:

Stmicroelectronics, Inc., Coppell, TX (US);

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Nicolas Loubet, Guilderland, NY (US);

James Kuss, Hudson, NY (US);

Assignees:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/16 (2006.01); H01L 27/12 (2006.01); H01L 21/84 (2006.01); H01L 29/165 (2006.01); H01L 29/06 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1211 (2013.01); H01L 21/02236 (2013.01); H01L 21/02532 (2013.01); H01L 21/02603 (2013.01); H01L 21/02639 (2013.01); H01L 21/02664 (2013.01); H01L 21/845 (2013.01); H01L 29/0673 (2013.01); H01L 29/16 (2013.01); H01L 29/165 (2013.01); H01L 21/02255 (2013.01);
Abstract

A method for making a semiconductor device may include forming, above a substrate, a stack of alternating layers of first and second semiconductor materials. The second semiconductor material may be different than the first semiconductor material. The method may further include forming fins from the stack, with each fin having alternating layers of the first and second semiconductor materials, and selectively removing sidewall portions of the second semiconductor material from the fins to define recesses therein. The method may also include forming a dielectric material within the recesses, forming additional first semiconductor material on sidewall portions of the first semiconductor material in the fins, and forming a dielectric layer overlying the fins to define nanowires including the first semiconductor material within the dielectric layer.


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